6In an asynchronous (ripple) counter:AEach flip-flop is clocked by the previous flip-flop's outputBOutputs never changeCNo flip-flops are usedDAll flip-flops share one clockView AnswerDiscussWorkspaceReportSaveEasy
7If each flip-flop in a 4-bit ripple counter has a 10 ns delay, the worst-case settling time is:A160 nsB40 nsC20 nsD10 nsView AnswerDiscussWorkspaceReportSaveMedium
9A modulus-6 counter built from a 3-bit counter is reset when the count reaches:A7B6 (110)C5D8View AnswerDiscussWorkspaceReportSaveEasy
10How many flip-flops are needed for a mod-10 (decade) counter?A3B10C5D4View AnswerDiscussWorkspaceReportSaveMedium